Generally, it is often the case that a system such as a digital camera processing image data deals data as two-dimensional data in a matrix state. It is often the case that access information indicating a position of data to be accessed is also represented in two dimension in this kind of system. On the other hand, for example, data areas are assigned corresponding to addresses increasing sequentially, in a semiconductor memory such as an SDRAM storing image data and so on. Namely, access information (address) to access the data stored in the semiconductor memory is represented in one dimension.
Japanese Laid-open Patent Publication No. 2001 -243112 and Japanese Laid-open Patent Publication No. 63-234361 describes a memory control device (semiconductor integrated circuit) converting two-dimensional access information into one-dimensional access information to access a semiconductor memory by using two-dimensional access information dealt in a system is proposed.
Recently, a function of a system processing image data is improved, and a system dealing both two-dimensional access information and one-dimensional access information is also proposed. On the other hand, a memory capacity of a semiconductor memory increases, and it may be possible to store data read/written by two-dimensional access information and data read/written by one-dimensional access information, in one semiconductor memory.
In such a case, it may be necessary for a semiconductor control device provided in a system controlling an access of the semiconductor memory, to access the semiconductor memory by using the one-dimensional access information and the two-dimensional access information. Further, it may be necessary to newly develop a conversion process unit mutually accessing data read/written from/to the semiconductor memory to enable to access the data area accessed by the two-dimensional access information by using the one-dimensional access information, or to enable to access the data area accessed by the one-dimensional access information by using the two-dimensional access information. In this case, it may be necessary to modify an interface unit of an existing data process unit (IP core) in accordance with an interface of the newly developed conversion process unit. A verification work of a design data may become necessary again if the IP core is modified only for a bit. As a result, a development period of the system becomes long, and a development cost increases because a design change and the verification work of the existing IP core may become necessary in addition to the development period of the new memory control device.
A proposition of the present embodiments is to shorten a development period of a system and to reduce a development cost of the system by effectively utilizing existing design properties.